WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 4
WG82574IT S LBAC
Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574IT S LBAC
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.0
5.0
6.0
7.0
4
3.4
3.5
Initialization ............................................................................................................62
4.1
4.2
4.3
4.4
4.5
4.6
Power Management and Delivery .............................................................................84
5.1
5.2
5.3
5.4
5.5
Non-Volatile Memory (NVM) Map ........................................................................... 102
6.1
6.2
Inline Functions ..................................................................................................... 128
7.1
System Management Bus (SMBus) .......................................................................60
NC-SI...............................................................................................................60
3.5.1
3.5.2
Introduction ......................................................................................................62
Reset Operation.................................................................................................62
Power Up..........................................................................................................64
4.3.1
4.3.2
Global Reset (PE_RST_N, PCIe In-Band Reset) ......................................................73
4.4.1
4.4.2
Timing Parameters.............................................................................................76
4.5.1
4.5.2
Software Initialization Sequence ..........................................................................77
4.6.1
4.6.2
4.6.3
4.6.4
4.6.5
4.6.6
Assumptions .....................................................................................................84
Power Consumption ...........................................................................................84
Power Delivery ..................................................................................................85
5.3.1
5.3.2
Power Management............................................................................................85
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Wake Up ..........................................................................................................94
5.5.1
5.5.2
5.5.3
Basic Configuration Table.................................................................................. 102
6.1.1
6.1.2
Manageability Configuration Words..................................................................... 124
6.2.1
6.2.2
Packet Reception ............................................................................................. 128
7.1.1
7.1.2
7.1.3
7.1.4
Interface Specification .............................................................................61
Electrical Characteristics ..........................................................................61
Power-Up Sequence ................................................................................64
Timing Diagram......................................................................................72
Reset Sequence......................................................................................73
Timing Diagram......................................................................................74
Timing Requirements ..............................................................................76
MDIO and NVM Semaphore ......................................................................76
Interrupts During Initialization..................................................................78
Global Reset and General Configuration .....................................................78
Link Setup Mechanisms and Control/Status Bit Summary .............................78
Initialization of Statistics..........................................................................80
Receive Initialization ...............................................................................80
Transmit Initialization..............................................................................81
The 1.9 V dc Rail ....................................................................................85
The 1.05 V dc Rail ..................................................................................85
82574 Power States ................................................................................85
Auxiliary Power Usage .............................................................................86
Power Limits by Certain Form Factors ........................................................87
Power States..........................................................................................87
Timing of Power-State Transitions .............................................................91
Advanced Power Management Wake Up .....................................................94
PCIe Power Management Wake Up ............................................................95
Wake-Up Packets....................................................................................95
Hardware Accessed Words ..................................................................... 104
Software Accessed Words ...................................................................... 117
SMBus APT Configuration Words ............................................................. 124
NC-SI Configuration Words .................................................................... 126
Packet Address Filtering......................................................................... 128
Receive Data Storage ............................................................................ 129
Legacy Receive Descriptor Format........................................................... 129
Extended Rx Descriptor ......................................................................... 132
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