UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 260
![8BIT MCU, 128K FLASH, 7K RAM, LQFP](/photos/19/1/190186/ge64lqfp05-40_sml.jpg)
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(3) Usage
260
TMHMD1
Outputs an arbitrary carrier clock from the TOH1 pin.
<1> Set each register.
<2> When TMHE1 = 1, 8-bit timer H1 starts counting.
<3> When TCE51 of 8-bit timer mode control register 51 (TMC51) is set to 1, 8-bit timer/event counter 51 starts
<4> After the count operation is enabled, the first compare register to be compared is the CMP01 register.
<5> When the count value of 8-bit timer counter H1 and the CMP11 register value match, the INTTMH1 signal
<6> By performing procedures <4> and <5> repeatedly, a carrier clock is generated.
<7> The INTTM51 signal is synchronized with count clock of 8-bit timer H1 and output as the INTTM5H1 signal.
<8> When the NRZ1 bit is high level, a carrier clock is output from the TOH1 pin.
<9> By performing the procedures above, an arbitrary carrier clock is obtained. To stop the count operation,
(i)
(ii) CMP01 register setting
(iii) CMP11 register setting
(iv) TMCYC1 register setting
(v) TCL51 and TMC51 register setting
counting.
When the count value of 8-bit timer counter H1 and the CMP01 register value match, the INTTMH1 signal
is generated, 8-bit timer counter H1 is cleared, and at the same time, the compare register to be compared
with 8-bit timer counter H1 is switched from the CMP01 register to the CMP11 register.
is generated, 8-bit timer counter H1 is cleared, and at the same time, the compare register to be compared
with 8-bit timer counter H1 is switched from the CMP11 register to the CMP01 register.
The INTTM5H1 signal becomes the data transfer signal for the NRZB1 bit, and the NRZB1 bit value is
transferred to the NRZ1 bit.
clear TMHE1 to 0.
TMHE1
0
Setting 8-bit timer H mode register 1 (TMHMD1)
• Compare value
• Compare value
• RMC1 = 1 ... Remote control output enable bit
• NRZB1 = 0/1 ... carrier output enable bit
• See 8.3 Registers Controlling 8-Bit Timer/Event Counters 50 and 51.
CKS12
0/1
Figure 9-14. Register Setting in Carrier Generator Mode
CKS11
0/1
CHAPTER 9 8-BIT TIMERS H0 AND H1
CKS10
0/1
User’s Manual U17554EJ4V0UD
TMMD11
0
TMMD10 TOLEV1
1
0/1
TOEN1
1
Timer output enabled
Timer output level inversion setting
Carrier generator mode selection
Count clock (f
Count operation stopped
CNT
) selection
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