UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 72

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
3.4.2 Register addressing
72
[Operand format]
[Function]
[Description example]
The general-purpose register to be specified is accessed as an operand with the register bank select flags
(RBS0 to RBS1) and the register specify codes (Rn and RPn) of an operation code.
Register addressing is carried out when an instruction with the following operand format is executed. When an
8-bit register is specified, one of the eight registers is specified with 3 bits in the operation code.
‘r’ and ‘rp’ can be described by absolute names (R0 to R7 and RP0 to RP3) as well as function names (X, A, C,
B, E, D, L, H, AX, BC, DE, and HL).
MOV A, C; when selecting C register as r
INCW DE; when selecting DE register pair as rp
Operation code
Operation code
r
rp
Identifier
CHAPTER 3 CPU ARCHITECTURE
0
1
User’s Manual U17554EJ4V0UD
1
0
X, A, C, B, E, D, L, H
AX, BC, DE, HL
1
0
0
0
0
0
Description
0
1
1
0
0
0
Register specify code
Register specify code

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