UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 606
![8BIT MCU, 128K FLASH, 7K RAM, LQFP](/photos/19/1/190186/ge64lqfp05-40_sml.jpg)
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) UART60
the user’s manual for the PG-FP4, FL-PR4, PG-FPL3, or FP-LITE3.
Notes 1.
Remark
606
FLMD0
V
GND
CLK
/RESET
SI/RxD
SO/TxD
SCK
Signal Name
DD
Note The above figure illustrates an example of wiring when using the clock output from the PG-FP4 or FL-PR4.
The dedicated flash memory programmer generates the following signals for the 78K0/FE2. For details, refer to
Transfer rate: 115200 bps
2.
When using the clock output from the PG-FPL3 or FP-LITE3, connect CLK to X1/P121 (pin 11), and connect
its inverted signal to X2/EXCLK/P122 (pin 10).
×: The pin does not have to be connected.
Only the X1 clock (f
using the clock output of the dedicated flash memory programmer, pin connection varies depending on the
type of the dedicated flash memory programmer used.
Only the internal high-speed oscillation clock (f
: Be sure to connect the pin.
: The pin does not have to be connected if the signal is generated on the target board.
• PG-FP4, FL-PR4:
• PG-FPL3, FP-LITE3:
Figure 24-7. Communication with Dedicated Flash Memory Programmer (UART60)
Output
I/O
Output
Output
Input
Output
Output
memory programmer
Dedicated flash
I/O
−
Cxxxxxx
Axxxx
Bxxxxx
Dedicated Flash memory programmer
PG-FP4
STATVE
Mode signal
V
Ground
Clock output to 78K0/FE2
Reset signal
Receive signal
Transmit signal
Transfer clock
X
DD
) or external main system clock (f
voltage generation/power monitoring
Connect CLK of the programmer to EXCLK/X2/P122 (pin 10).
Connect CLK of the programmer to X1/P121 (pin 11), and connect its inverted
signal to X2/EXCLK/P122 (pin 10).
CHAPTER 24 FLASH MEMORY
/RESET
SO/TxD
Table 24-4. Pin Connection
CLK
FLMD0
SI/RxD
User’s Manual U17554EJ4V0UD
GND
CLK
V
Note
DD
Pin Function
RH
) can be used when CSI10 is used.
EXCLK
RESET
TxD60
RxD60
EXCLK
FLMD0
V
V
X1
X2
DD
SS
) can be used when UART60 is used. When
/EV
/EV
SS
DD
Note
/AV
/AV
SS
REF
FLMD0
V
V
Note 1
RESET
SO10/TxD60
SI10/RxD60
SCK10
DD
SS
, EV
, EV
78K0/FE2
Pin Name
78K0/FE2
SS
DD
, AV
, AV
SS
REF
CSI10
×
Note 2
Connection
UART60
Note 1
×
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