UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 377
![8BIT MCU, 128K FLASH, 7K RAM, LQFP](/photos/19/1/190186/ge64lqfp05-40_sml.jpg)
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(5) SO1n output (see (a) in Figures 15-1 and 15-2)
The status of the SO1n output is as follows if bit 7 (CSIE1n) of serial operation mode register 1n (CSIM1n) is
cleared to 0.
Notes 1.
Caution If a value is written to TRMD1n, DAP1n, and DIR1n, the output value of SO1n
Remark n = 0, 1
TRMD1n = 0
TRMD1n = 1
TRMD1n
2.
changes.
The actual output of the SO10/P12 or SO11/P74 pin is determined according to
PM12 and P12 or PM74 and P74, as well as the SO1n output.
Status after reset
Note
CHAPTER 15 SERIAL INTERFACES CSI10 AND CSI11
DAP1n = 0
DAP1n = 1
DAP1n
Table 15-3. SO1n Output Status
−
User’s Manual U17554EJ4V0UD
DIR1n = 0
DIR1n = 1
DIR1n
−
−
Outputs low level
Value of SO1n latch
(low-level output)
Value of bit 7 of SOTB1n
Value of bit 0 of SOTB1n
SO1n Output
Note 2
Note 1
377
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