W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 149

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

11.2.46
When the device is in Extended Function mode and EFIR is 38H, the CR38 register can be accessed
through EFDR. The bit definitions are as follows:
PRTCNT7 - PRTCNT0 (Bit 7 - bit 0): printer port idle timer count.
This register is used to specify the initial value of the printer port idle timer. Once the printer port
enters the working state (that is, after any access to this device, any IRQ, and any external input), the
power down machine of the printer port reloads this count value and this idle timer counts down.
When the timer counts down to zero, printer port enters the power down state ,i.e., sleeping state. If
this register is set to 00H, the power down function will be invalid. The time resolution of this value is
minute or second, which is defined by the TMIN_SEL bit of CR3A. Note that (1). This register is valid
only when the power management function of the printer port is enabled, that is, CHIPPME=1 (CR32
bit 7) and PRTPME=1 (CR32 bit 3), (2). If the register is set to 00H, the printer port will remain in the
current state (working or sleeping).
11.2.47
When the device is in Extended Function mode and EFIR is 39H, the CR39 register can be accessed
through EFDR. The bit definitions are as follows:
GSBCNT7 - GSBCNT0 (Bit 7 - bit 0): global stand-by idle timer count.
Once all devices of the chip (including UART A, UART B, FDC and the printer port) are all in the
power down state, the power down machine of W83877ATF chip loads this register value and counts
down. When the timer counts to zero, the whole chip enters the power down state, i.e., sleeping state.
If this register is set to 0, the power down function will be invalid. The time resolution of this register
value is minute or second, which is defined by the TMIN_SEL bit of CR3A. Note that (1). This register
is valid when the CHIPPME = 1 (CR32 bit 7), and (2) If the register is set to 00H, W83877ATF/ATG
chip will remain in the current state (working or sleeping).
Configuration Register 38 (CR38), default=00H
Configuration Register (CR39), default=00H
7
7
6
6
5
5
4
4
3
3
- 142 -
2
2
W83877ATF/W83877ATG
1
1
0
0
GSBCNT0
GSBCNT1
GSBCNT2
GSBCNT3
GSBCNT4
GSBCNT5
GSBCNT6
GSBCNT7
PRTCNT0
PRTCNT1
PRTCNT2
PRTCNT3
PRTCNT4
PRTCNT5
PRTCNT6
PRTCNT7