W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 3

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table of Contents-
1. GENERAL DESCRIPTION ................................................................................................................ 1
2. FEATURES ........................................................................................................................................ 2
3. PIN CONFIGURATION...................................................................................................................... 4
4. PIN DESCRIPTION ........................................................................................................................... 5
5. FDC FUNCTIONAL DESCRIPTION................................................................................................ 15
6. UART PORT .................................................................................................................................... 37
4.1
4.2
4.3
4.4
5.1
5.2
6.1
6.2
Host Interface............................................................................................................................ 5
Serial Port Interface .................................................................................................................. 7
Multi-Mode Parallel Port............................................................................................................ 9
FDC Interface.......................................................................................................................... 13
W83877ATF/ATG FDC ........................................................................................................... 15
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
5.1.8
5.1.9
Register Descriptions.............................................................................................................. 26
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
Universal Asynchronous Receiver/Transmitter (UART A, UART B) ...................................... 37
Register Address .................................................................................................................... 38
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
AT interface ..............................................................................................................................15
FIFO (Data) ..............................................................................................................................15
Data Separator .........................................................................................................................16
Write Precompensation ............................................................................................................16
Perpendicular Recording Mode ................................................................................................16
Tape Drive................................................................................................................................17
FDC Core .................................................................................................................................17
FDC Commands.......................................................................................................................17
FDC Instruction Sets ................................................................................................................18
Status Register A (SA Register) (Read base address + 0).......................................................26
Status Register B (SB Register) (Read base address + 1).......................................................28
Digital Output Register (DO Register) (Write base address + 2) ..............................................30
Tape Drive Register (TD Register) (Read base address + 3)...................................................30
Main Status Register (MS Register) (Read base address + 4).................................................31
Data Rate Register (DR Register) (Write base address + 4) ....................................................31
FIFO Register (R/W base address + 5) ....................................................................................33
Digital Input Register (DI Register) (Read base address + 7)...................................................35
Configuration Control Register (CC Register) (Write base address + 7) ..................................36
UART Control Register (UCR) (Read/Write) ............................................................................39
UART Status Register (USR) (Read/Write) ..............................................................................40
Handshake Control Register (HCR) (Read/Write) ....................................................................41
Handshake Status Register (HSR) (Read/Write)......................................................................42
UART FIFO Control Register (UFR) (Write only)......................................................................43
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W83877ATF/W83877ATG