W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 49

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W83877ATG

Manufacturer Part Number
W83877ATG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83877ATG

Lead Free Status / RoHS Status
Supplier Unconfirmed
6.2.4
This register reflects the current state of four input pins for handshake peripherals such as a modem,
and records changes on these pins.
Bit 7: This bit is the opposite of the DCD input. This bit is equivalent to bit 3 of HCR in loopback
Bit 6: This bit is the opposite of the RI input. This bit is equivalent to bit 2 of HCR in loopback mode.
Bit 5: This bit is the opposite of the DSR input. This bit is equivalent to bit 0 of HCR in loopback
Bit 4: This bit is the opposite of the CTS input. This bit is equivalent to bit 1 of HCR in loopback
Bit 3: TDCD. This bit indicates that the DCD pin has changed state after HSR was read by the CPU.
Bit 2: FERI. This bit indicates that the RI pin has changed from low to high state after HSR was read
Bit 1: TDSR. This bit indicates that the DSR pin has changed state after HSR was read by the CPU.
Bit 0: TCTS. This bit indicates that the CTS pin has changed state after HSR was read by the CPU.
mode.
mode.
mode.
by the CPU.
Handshake Status Register (HSR) (Read/Write)
7
6
5
4
3
2
1
- 42 -
0
W83877ATF/W83877ATG
Clear to send (CTS)
Data set ready (DSR)
Data carrier detect (DCD)
CTS toggling (TCTS)
DSR toggling (TDSR)
RI falling edge (FERI)
DCD toggling (TDCD)
Ring indicator (RI)

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