W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 69

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.3.5.3. Reg2 - Mapped UART FIFO Control Register (MP_UFR)
Read only. Reading this register returns UART FIFO Control Register (UFR) value of SET 0.
6.3.5.4. Reg3 - Sets Select Register (SSR)
Reading this register returns E4
6.3.6
6.3.6.1. Set4.Reg0, 1 - Timer Value Register (TMRL/TMRH)
This is a 12-bit timer with resolution of 1 ms, that is, the programmed maximum time is 2
timer is a down-counter. The timer starts down count when the bit EN_TMR (Enable Timer) of
Set4.Reg2. is set to 1. When the timer down counts to zero and EN_TMR=1, the TMR_I is set to 1.
When the counter down counts to zero, a new initial value will be re-loaded into timer counter.
6.3.6.2. Set4.Reg2 - Infrared mode Select (IR_MSL)
default Value
Advanced
Reset Value
ADDRESS
OFFSET
MODE
UART
REG.
SSR
0
1
2
3
4
5
6
7
Set4 - TX/RX/Timer counter registers and IR control registers.
SSR7
BIT 7
BIT 7
REGISTER
1
0
-
IR_MSL
RFRLH
TFRLH
RFRLL
TFRLL
TMRH
NAME
TMRL
SSR
SSR6
BIT 6
BIT 6
1
0
-
Timer Value Low Byte
Timer Value High Byte
Infrared mode Select
Sets Select Register
Transmitter Frame Length Low Byte
Transmitter Frame Length High Byte
Receiver Frame Length Low Byte
Receiver Frame Length High Byte
16
. Write it to select other register Set.
SSR5
BIT 5
BIT 5
1
0
-
SSR4
BIT 4
BIT 4
- 62 -
0
0
-
REGISTER DESCRIPTION
W83877ATF/W83877ATG
IR_MSL1 IR_MSL0 TMR_TST EN_TMR
SSR3
BIT 3
BIT 3
0
0
SSR2
BIT 2
BIT 2
1
0
SRR1
BIT 1
BIT 1
0
0
12
-1 ms. The
SRR0
BIT 0
BIT 0
0
0