W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 42

• Manufacturer Part Number: W83877ATG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83877ATG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

5.2.8
The Digital Input Register is an 8-bit read-only register used for diagnostic purposes. In a PC/XT or AT
only Bit 7 is checked by the BIOS. When the register is read, Bit 7 shows the complement of
In the PS/2 mode, the bit definitions are as follows:
DSKCHG (Bit 7):
This bit indicates the complement of the DSKCHG input.
Bit 6-3: These bits are always a logic 1 during a read.
DRATE1 DRATE0 (Bit 2, 1):
These two bits select the data rate of the FDC. Refer to the DR register bits 1 and 0 for the settings
corresponding to the individual data rates.
0
1
In the PS/2 Model 30 mode, the bit definitions are as follows:
HIGH DENS (Bit 0):
DSKCHG
Digital Input Register (DI Register) (Read base address + 7)
,
500 KB/S or 1 MB/S data rate (high density FDD)
250 KB/S or 300 KB/S data rate
while other bits of the data bus remain in tri-state. Bit definitions are as follows:
7
x
6
x
5
x
7
4
7
1
x
6
3
6
0
1
x
5
x
2
5
0
Reserved for the hard disk controller
1
x
During a read of this register, these bits are in tri-state
1
4
0
4
1
3
x
0
3
- 35 -
2
DSKCHG
2
1
W83877ATF/W83877ATG
1
0
0
DRATE1
HIGH DENS
DRATE0
DSKCHG
Publication Release Date:November 2006
DSKCHG
DRATE0
DRATE1
NOPREC
DMAEN
Version 1.0