W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 67

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W83877ATG

Manufacturer Part Number
W83877ATG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83877ATG

Lead Free Status / RoHS Status
Supplier Unconfirmed
Bit 5, 4:
Bit 3, 2:
Bit 2, 0:
6.3.4.5. Reg6 - Transmitter FIFO Depth (TXFDTH) (Read Only)
Advanced
Reset Value
MODE
UART
RX_FSZ1~0
TX_FSZ1~0
PR_DIV1~0
PR_DIV1~0 - Pre-Divisor 1~0.
These bits select pre-divisor for external input clock 24M Hz. The clock through the pre-
divisor then inputs to baud rate divisor of UART.
RX_FSZ1~0 - Receiver FIFO Size 1~0
These bits setup receiver FIFO size when FIFO is enabled.
TX_FSZ1~0 - Transmitter FIFO Size 1~0
These bits setup transmitter FIFO size when FIFO is enabled.
BIT 7
1X
1X
00
01
00
01
00
01
10
11
0
0
BIT 6
0
0
TXFD5
BIT 5
0
PRE-DIVISOR
TXFD4
BIT 4
- 60 -
1.625
13.0
6.5
0
1
W83877ATF/W83877ATG
TXFD3
BIT 3
RX FIFO SIZE
TX FIFO SIZE
0
Reserved
Reserved
16 -Byte
32 -Byte
16 -Byte
32 -Byte
TXFD2
BIT 2
0
MAX. BAUD RATE
115.2K bps
921.6K bps
230.4K bps
1.5M bps
TXFD1
BIT 1
0
TXFD1
BIT 0
0

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