W83877ATG Nuvoton Technology Corporation of America, W83877ATG Datasheet - Page 70
W83877ATG
Manufacturer Part Number
W83877ATG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83877ATG.pdf
(194 pages)
Specifications of W83877ATG
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Bit 7~4: Reserved , write to 0.
Bit 3, 2: IR_MSL1, 0 - Infrared mode Select
Bit 1:
Bit 0:
6.3.6.3. Set4.Reg3 - Set Select Register (SSR)
Reading this register returns E8
6.3.6.4. Set4.Reg4, 5 - Transmitter Frame Length (TFRLL/TFRLH)
default Value
Reset Value
Reset Value
TFRLH
TFRLL
REG.
REG.
SSR
Select legacy UART or SIR or ASK-IR mode. Note that using legacy SIR/ASK-IR should set
DIS_BACK=1 to avoid backward operation when programming baud rate. Mode selected is
shown below. Note that to avoid legacy backward operation, the bit of DIS_BACK (Disable
Backward, in Set2.Reg4. Bit7) should be set to 1 when legacy ASK-IR mode or legacy SIR
mode is selected.
TMR_TST - Timer Test
Write to 1 will cause reading the TMRL/TMRH will return the programmed values of
TMRL/TMRH, that is, it does not return down count counter value. This bit is for test timer
register.
EN_TMR - Enable Timer
Write to 1 enables the timer.
IR_MSL1, 0
SSR7
BIT 7
BIT 7
bit 7
1
0
-
-
00
01
10
11
SSR6
BIT 6
BIT 6
bit 6
1
0
-
-
16
. A write to this register selects other Set.
SSR5
BIT 5
BIT 5
bit 5
1
0
-
-
SSR4
bit 12
BIT 4
BIT 4
bit 4
1
0
0
- 63 -
OPERATION MODE SELECTED
W83877ATF/W83877ATG
SSR3
bit 11
BIT 3
BIT 3
bit3
1
0
0
Legacy ASK-IR
Legacy UART
Publication Release Date:November 2006
Legacy SIR
Reserved
SSR2
bit 10
BIT 2
BIT 2
bit 2
0
0
0
SRR1
BIT 1
BIT 1
bit 1
bit 9
0
0
0
Version 1.0
SRR0
BIT 0
BIT 0
bit 8
bit 0
0
0
0
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