PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 130

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

The use of the data field depends on the function defined by the code field. If a CFI time
slot is defined as a switched channel, the data field is interpreted as a pointer to the data
memory and defines therefore to which PCM time slot the connection shall be made. For
preprocessed channels, the data field serves as a buffer for the command/indication or
signaling value. If a
exchanged with the CFI time slot.
The data memory refers to the PCM interface such that for each upstream time slot
there is a 4 bit code field and an 8 bit data field location, whereas for each downstream
time slot there is only an 8 bit data field location.
The data field locations buffer the PCM data transmitted and received over the PCM
interface. The code field (tristate field) defines whether the upstream data field contents
should be transmitted in the associated PCM time slot or whether the time slot should
be switched to high impedance.
5.3
5.3.1
The EPIC memory is composed of the Control Memory (CM) and the Data Memory
(DM). Their structure is shown in figure 47.
The control memory refers to the Configurable Interface (CFI) such that for each CFI
time slot and for each direction (upstream and downstream) there is a 4 bit code field
and an 8 bit data field location.
The code field defines the function of the corresponding CFI time slot. A time slot, may
for example, be transparently switched through to the PCM interface (switched channel)
or it may serve as monitor, feature control, command/indication or signaling channel in
an IOM or SLD application (preprocessed channel) or it may be directly switched to the
Semiconductor Group
P interface ( P channel).
Data and Control Memories
Memory Structure
P channel is programmed, the data field content is directly
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Application Hints
PEB 2055
PEF 2055