PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 197

no-image

PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
(10
MF Channel Active Indication Register
This register is only used in IOM-2 applications (active handshake protocol) in order to
identify active monitor channels when the ‘Search for active monitor channels’ command
(CMDR:MFSO) has been executed.
SO:
SAD5 … 0:
Command Register
Example
In CFI mode 0, IOM channel 5 (time slot 16 … 19) of port 2 shall be addressed for a
transmit monitor transfer:
MFSAR = 0010 0110
MFAIR:
CMDR
Writing to CMDR starts the respective monitor channel operation.
MFT1 … 0:
MFSO:
Semiconductor Group
B
)
bit 7
bit 7
0
0
MF Channel Search On; this bit indicates whether the EPIC is still
busy looking for an active channel (1) or not (0).
Subscriber Address 5 … 0; after an ISTA:MAC interrupt these bits
point to the port and time slot where an active channel has been
found. The coding is identical to MFSAR:SAD5 … SAD0. The
contents of MFAIR can directly be copied to MFSAR in order to point
the MF handler to the channel which requests a monitor receive
operation.
MF Channel Transfer Control Bits 1, 0; these bits start the monitor
transfer enabling the contents of the MFFIFO to be exchanged with
the subscriber circuits as specified in MFSAR. The function of some
commands
(OMDR:MFPS). Table 32 summarizes all available MF commands.
MF Channel Search On; if set to 1, the EPIC starts to search for active
MF channels. Active channels are characterized by an active MX bit
(logical 0) sent by the remote transmitter. If such a channel is found,
B
SO
; the monitor channel occupies time slot 18 (10010
ST
SAD5
depends
TIG
SAD4
read
CFR
197
furthermore
read reset value:
SAD3
MFT1
reset value:
on
SAD2
MFT0
the
selected
Application Hints
MFSO
SAD1
00
undefined
B
PEB 2055
H
PEF 2055
) of port 2
bit 0
bit 0
protocol
MFFR
SAD0

Related parts for PEF2054NV21XT