PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 63

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

a) Switching Applications
4. Writing data to the upstream or downstream CM data and code field
MACR:
Note: The corresponding CFI time slot bits to be transferred are chosen in the
Semiconductor Group
(e.g. switching a CFI to/from PCM connection).
0
CSCR-register.
The 4-bit code field of the control memory (CM) defines the functionality of a
CFI time slot and thus the meaning of the corresponding data field. This 4-bit
code, written to the MACR:CMC3..0 bit positions, will be transferred to the
CM code field. The 8-bit MADR value is at the same time transferred to the
CM data field. There are codes for switching applications, pre-processed
applications and for direct P access applications, as shown below:
CMC = 0000
CMC = 0001
CMC = 0010
CMC = 0011
CMC = 0100
CMC = 0101
CMC = 0110
CMC = 0111
1
1
Unassigned channel (e.g. cancelling an assigned channel)
Bandwidth 64 kbit/s
Bandwidth 32 kbit/s
Bandwidth 32 kbit/s
Bandwidth 16 kbit/s
Bandwidth 16 kbit/s
Bandwidth 16 kbit/s
Bandwidth 16 kbit/s
1
63
CMC3
PCM time slot bits transferred: 7..0
PCM time slot bits transferred: 3..0
PCM time slot bits transferred: 7..4
PCM time slot bits transferred: 1..0
PCM time slot bits transferred: 3..2
PCM time slot bits transferred: 5..4
PCM time slot bits transferred: 7..6
Detailed Register Description
CMC2
CMC1
PEB 2055
PEF 2055
CMC0