PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 44

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PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
CFI-port 0, time slot 3 (odd), downstream
CFI-port 0, time slot 2 (even), upstream
CFI-port 0, time slot 3 (odd), upstream
Repeat the above programming steps for the remaining CFI ports and time slots.
This procedure can be speeded up by selecting the CM initialization mode
(OMDR:OMS1..0 = 10). If this selection is made, the access time to a single memory
location is reduced to 2.5 RCL cycles. The complete initialization time for 32 IOM-2
channels is then reduced to 128
CFI-port 0, time slot 2 (even), downstream
Semiconductor Group
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
MADR =
MAAR =
MACR =
Wait for STAR:MAC = 0
FF
08
78
FF
09
7B
FF
88
78
FF
89
70
H
H
H
H
H
H
H
H
H
H
H
H
; the C/I-value “1111” will be transmitted upon CFI activation
; addresses ts 2 down
; CM-code “1000”
; don’t care
; addresses ts 3 down
; CM-code “1011”
; the C/I-value “1111” is expected upon CFI activation
; address ts 2 up
; CM-code “1000”
; don’t care
; address ts 3 up
; CM-code “0000”
0.61 s = 78 s.
44
Operational Description
PEB 2055
PEF 2055

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