PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 172

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PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
Considering a Bit Shift
A bit shift will also influence switching delays.
If the PCM frame is shifted relative to the frame signal, proceed as indicated below:
Shift only the PCM part of the figure (‘PCM line’ with the time slot numbers), relative to
the rest of the figure, to the left.
If the CFI frame is shifted relative to the framing signal, then the CFI part, including the
figure of the RCL, and all read and write cycle points are shifted left relative to the PCM
part. If CBSR:CDS = 000 or 001, then the frame CFI part is shifted to the right.
The figure so produced should be processed as previously described.
Note: If a bit shift has been installed while the PCM interface is already in the
5.4.4.3 Example: Switching of Wide Band ISDN Channels with the EPIC
The EPIC shall switch 6 B-channels of a digital subscriber to an 8 MBit/s PCM highway
guaranteeing frame integrity. The system uses the IOM-2 interface to adapt to a multiple
S-interface. No bit shift has to be applied. The tables below will help to determine the
combination of input/output ports and time slots, that meet the requirements.
Semiconductor Group
synchronous state, the following procedure has to be applied:
1.) Unsynchronize the PCM interface by writing an invalid number
2.) Resynchronize the PCM interface by writing the correct number to PBNR
to register PBNR
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Application Hints
PEB 2055
PEF 2055
®

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