PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 50

no-image

PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
Semiconductor Group
4.2.1.2 Bit Number per PCM-Frame (PBNR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: FF
BNF7..0
4.2.1.3 PCM-Offset Downstream Register (POFD)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 00
OFD9..2
bit 7
bit 7
OFD9
BNF7
Bit Number per PCM Frame.
PCM-mode 0: BNF7..0 = number of bits – 1
PCM-mode 1: BNF7..0 = (number of bits – 2) / 2
PCM-mode 2: BNF7..0 = (number of bits – 4) / 4
The value programmed in PBNR is also used to check the PFS period.
Offset Downstream bit 9…2.
These bits together with PCSR:OFD1..0 determine the offset of the PCM
frame in downstream direction. The following formulas apply for calculating
the required register value. BND is the bit number in downstream direction
marked by the rising internal PFS edge. BPF denotes the actual number of
bits constituting a frame.
PCM mode 0:
PCM mode 1:
PCM mode 2:
OFD8
BNF6
H
H
OFD7
BNF5
OFD9..2 = mod
PCSR:OFD1..0 = 0
OFD9..1 = mod
PCSR: PFD0 = 0
OFD9..0 = mod
OFD6
BNF4
50
OFD5
BNF3
BPF
BPF
BPF
(BND – 17 + BPF)
(BND – 33 + BPF)
(BND – 65 + BPF)
read/write
read/write
read/write
read/write
Detailed Register Description
OFD4
BNF2
address: 1
OMDR:RBS = 1
address: 22
address: 2
OMDR:RBS = 1
address: 24
OFD3
BNF1
PEB 2055
PEF 2055
H
H
bit 0
bit 0
H
H
OFD2
BNF0

Related parts for PEF2054NV21XT