PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 209

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

Figure 74
The value written to the downstream CM data field location is transmitted repeatedly in
every frame (CFI idle value) during the corresponding downstream CFI time slot until a
new value is loaded or the ‘ P channel’ function is disabled. There are no interrupts
generated.
The upstream CM data field can be read at any time. The CM data field is updated in
every frame. The last value read represents the value received. There are no interrupts
generated.
For frame-synchronous exchange of data between the P and the CFI, the synchronous
transfer utility must be used (refer to chapter 5.7). Since this utility realizes the data
exchange between the STDA (STDB) register and the CM data field, it is also necessary
to initialize the corresponding CFI time slots as P channels.
The following sequences can be used to program, verify, and cancel a CFI P channel:
Semiconductor Group
P Access to the Upstream CFI Frame
MACR:
Up-
stream
1 1 0 0 1 0 0 0
CFI
Frame
0
127
1
Code Field
0
0
1
Control Memory
MADR:
209
Data Field
MAAR:
1
MA6
Application Hints
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PEB 2055
PEF 2055
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ITD08090
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