PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 148

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

Tristate Behavior at the Configurable Interface
The downstream control memory code field, together with the CSCR and OMDR
registers also defines the state of the output driver at the downstream CFI ports.
Unassigned channels (code “0000”) are set to the inactive state. Subchannels (codes
“0010” to “0111”) are only active during the subtime slot position specified in CSCR. The
OMDR:COS bit selects between tristate outputs and open drain outputs:
Table 25
Logical State
Logical 0
Logical 1
Inactive
1)
Figure 55 illustrates this behavior in case of tristate outputs:
Figure 55
Tristate Behavior at the CFI
Semiconductor Group
An external pull-up resistor is required to establish a high voltage level.
CFI Time-Slot #
CM Data Field
CM Code Field
DD #
High Z
1 -
0 -
X X X X X X X X
0
Unassigned
Channel
0
N
0
Tristate Outputs
Low voltage level
High voltage level
High impedance
0
0
(Switched from PCM)
64 kbit/s Channel
Pointer to DM
0
N+1
148
0
1
CSCR : SC#1..#0 = 01
(Switched from PCM)
0
16 kbit/s Channel
Pointer to DM
1
N+2
1
Open Drain Outputs
Low voltage level
Not driven
Not driven
0
1
1
(Always 64 kbit/s)
µP Channel
0
Application Hints
1)
1)
1
0
N+3
1
0
0
PEB 2055
0
PEF 2055
ITD08070
1
1
0