PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 70

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

Semiconductor Group
4.2.4.6 Synchronous Transfer Transmit Address Register B (SAXB)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
The SAXB register specifies for synchronous transfer channel B to which output
interface, port and time slot the serial data contained in the STDB register is sent.
ISXB
MTXB6..0
4.2.4.7 Synchronous Transfer Control Register (STCR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 00xxxxxx
The STCR register bits are used to enable or disable the synchronous transfer utility and
to determine the sub time slot bandwidth and position if a PCM interface time slot is
involved.
TAE, TBE Transfer Channel A (B) Enable.
bit 7
bit 7
ISXB
TBE
MTXB6
Interface Select Transmit for channel B.
0… selects the PCM interface as the output interface for synchronous
1… selects the CFI interface as the output interface for synchronous
number at the interface selected by ISXB according to tables 3 and 4:
MTXB6..0 = MA6..0.
1… enables the P transfer of the corresponding channel.
0… disables the P transfer of the corresponding channel.
P-Transfer Transmit Address for channel B; selects the port and time slot
TAE
H
channel B.
channel B.
B
MTXB5
CTB2
MTXB4
CTB1
70
MTXB3
CTB0
read/write
read/write
read/write
read/write
Detailed Register Description
MTXB2
CTA2
OMDR:RBS = 0
address: 10
address: 09
OMDR:RBS = 0
address: 12
address: 8
MTXB1
CTA1
PEB 2055
PEF 2055
H
bit 0
bit 0
H
H
H
MTXB0
CTA0