EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 33
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 1: Overview for the Stratix IV Device Family
Integrated Software Platform
Integrated Software Platform
Ordering Information
Figure 1–4. Stratix IV GX and E Device Packaging Ordering Information
February 2011 Altera Corporation
F: FineLine BGA (FBGA)
H: Hybrid FineLine BGA
EP4SGX: Stratix IV Transceiver
EP4SE: Stratix IV Logic/Memory
70
110
180
230
290
360
530
820
Device Density
Package Type
Family S i g n a t u r e
f
Transceiver Count
The Quartus II software provides an integrated environment for HDL and schematic
design entry, compilation and logic synthesis, full simulation and advanced timing
analysis, SignalTap II Logic Analyzer, and device configuration of Stratix IV designs.
The Quartus II software provides the MegaWizard
generate different functional blocks, such as memory, PLL, and digital signal
processing logic. For transceivers, the Quartus II software provides the ALTGX
MegaWizard Plug-In Manager interface that guides you through configuration of the
transceiver based on your application requirements.
The Stratix IV GX and GT transceivers allow you to implement low-power and
reliable high-speed serial interface applications with its fully reconfigurable
hardware, optimal signal integrity, and integrated Quartus II software platform.
For more information about the Quartus II software features, refer to the
Handbook.
This section describes the Stratix IV E, GT, and GX devices ordering information.
Figure 1–4
D: 8
F: 16
H: 24
K: 36
N: 48
EP4SGX
230
shows the ordering codes for Stratix IV GX and E devices.
K
F
Corresponds to pin count
29 = 780 pins
35 = 1152 pins
40 = 1517 pins
43 = 1760 pins
45 = 1932 pins
Ball Array Dimension
40
C
2
ES
™
Plug-In Manager user interface to
ES: Engineering sample
Indicates specific device options
N: Lead-free devices
2, 2x, 3, or 4, with 2 being the fastest
C: Commercial temperature (t
I :
Operating Temperature
Speed Grade
Optional Suffix
Industrial temperature (t
Stratix IV Device Handbook Volume 1
J
=- 40 C to 100 C)
J
Quartus II
= 0 C to 85 C)
1–19
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