CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 24

• Manufacturer Part Number: CY7C67200-48BAXI
• Description: USB HOST/PERIPH CNTRLR 48LFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-OTG™r
• Type: OTG Programmable USB On The Gor

Specifications of CY7C67200-48BAXI

• Package / Case: 48-LFBGA
• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 3.6 V, 3 V ~ 3.6 V
• Current - Supply: 80mA, 135mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Rate: 2 Mbps
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Operating Supply Voltage: 2.7 V to 3.6 V
• Controller Family/series: PSoC 1
• Core Size: 16 Bit
• No. Of I/o's: 25
• Program Memory Size: 16KB
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2262; CY7C67200-48BAXI

Document #: 38-08014 Rev. *G
Host n Count Result Register [R]
Register Description
The Host n Count Result register is a read-only register that
contains the size difference in bytes between the Host Count
Value specified in the Host n Count register and the last packet
received. If an overflow or underflow condition occurs, that is
the received packet length differs from the value specified in
the Host n Count register, the Length Exception Flag bit in the
Host n Endpoint Status register will be set. The value in this
register is only valid when the Length Exception Flag bit is set
and the Error Flag bit is not set; both bits are in the Host n
Endpoint Status register.
Host n Device Address Register [W]
Register Description
The Host n Device Address register is a write-only register that
contains the USB Device Address that the host wishes to
communicate with.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• Host 1 Count Result Register 0xC088
• Host 2 Count Result Register 0xC0A8
• Host 1 Device Address Register 0xC088
• Host 2 Device Address Register 0xC0A8
...Reserved
15
15
R
R
0
7
0
0
7
0
-
-
14
14
W
R
R
0
6
0
0
6
0
-
Figure 24. Host n Device Address Register
Figure 23. Host n Count Result Register
13
13
W
R
R
0
5
0
0
5
0
-
12
12
W
R
R
0
4
0
4
0
0
-
Reserved...
Result (Bits [15:0])
The Result field contains the differences in bytes between the
received packet and the value specified in the Host n Count
register. If an overflow condition occurs, Result [15:10] is set
to ‘111111’, a 2’s complement value indicating the additional
byte count of the received packet. If an underflow condition
occurs, Result [15:0] indicates the excess byte count (number
of bytes not used).
Reserved
All reserved bits must be written as ‘0’.
Address (Bits [6:0])
The Address field contains the value of the USB address for
the next device that the host is going to communicate with.
This value must be written by firmware.
Reserved
All reserved bits must be written as ‘0’.
Result...
...Result
Address
11
11
W
R
R
0
3
0
3
0
0
-
10
10
W
R
R
0
2
0
2
0
0
-
W
R
R
9
0
1
0
1
0
9
0
-
CY7C67200
Page 24 of 78
W
R
R
8
0
0
0
0
0
8
0
-
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