CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 27

• Manufacturer Part Number: CY7C67200-48BAXI
• Description: USB HOST/PERIPH CNTRLR 48LFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-OTG™r
• Type: OTG Programmable USB On The Gor

Specifications of CY7C67200-48BAXI

• Package / Case: 48-LFBGA
• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 3.6 V, 3 V ~ 3.6 V
• Current - Supply: 80mA, 135mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Rate: 2 Mbps
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Operating Supply Voltage: 2.7 V to 3.6 V
• Controller Family/series: PSoC 1
• Core Size: 16 Bit
• No. Of I/o's: 25
• Program Memory Size: 16KB
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2262; CY7C67200-48BAXI

Document #: 38-08014 Rev. *G
Host n SOF/EOP Count Register [R/W]
Register Description
The Host n SOF/EOP Count register contains the SOF/EOP
Count Value that is loaded into the SOF/EOP counter. This
value is loaded each time the SOF/EOP counter counts down
to zero. The default value set in this register at power-up is
0x2EE0, which will generate a 1-ms time frame. The
SOF/EOP counter is a down counter decremented at a
12-MHz rate. When this register is read, the value returned is
the programmed SOF/EOP count value.
Host n SOF/EOP Counter Register [R]
Register Description
The Host n SOF/EOP Counter register contains the current
value of the SOF/EOP down counter. This value can be used
to determine the time remaining in the current frame.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• Host 1 SOF/EOP Count Register 0xC092
• Host 2 SOF/EOP Count Register 0xC0B2
• Host 1 SOF/EOP Counter Register 0xC094
• Host 2 SOF/EOP Counter Register 0xC0B4
R/W
15
15
X
R
X
0
7
1
7
-
-
Reserved
Reserved
R/W
14
14
X
R
X
0
6
1
6
-
-
Figure 28. Host n SOF/EOP Counter Register
Figure 27. Host n SOF/EOP Count Register
R/W
R/W
13
13
R
X
R
X
1
5
1
5
R/W
R/W
12
12
R
X
R
X
0
4
0
4
Count (Bits [13:0])
The Count field sets the SOF/EOP counter duration.
Reserved
All reserved bits must be written as ‘0’.
Counter (Bits [13:0])
The Counter field contains the current value of the SOF/EOP
down counter.
...Counter
...Count
R/W
R/W
11
11
R
X
R
X
1
3
0
3
Counter...
Count...
R/W
R/W
10
10
R
X
R
X
1
2
0
2
R/W
R/W
R
X
R
X
9
1
1
0
9
1
CY7C67200
Page 27 of 78
R/W
R/W
R
X
R
X
8
0
0
0
8
0
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