CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 26

• Manufacturer Part Number: CY7C67200-48BAXI
• Description: USB HOST/PERIPH CNTRLR 48LFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-OTG™r
• Type: OTG Programmable USB On The Gor

Specifications of CY7C67200-48BAXI

• Package / Case: 48-LFBGA
• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 3.6 V, 3 V ~ 3.6 V
• Current - Supply: 80mA, 135mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Rate: 2 Mbps
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Operating Supply Voltage: 2.7 V to 3.6 V
• Controller Family/series: PSoC 1
• Core Size: 16 Bit
• No. Of I/o's: 25
• Program Memory Size: 16KB
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2262; CY7C67200-48BAXI

Document #: 38-08014 Rev. *G
Host n Status Register [R/W]
Register Description
The Host n Status register provides status information for host
operation. Pending interrupts can be cleared by writing a ‘1’ to
the corresponding bit. This register can be accessed by the
HPI interface.
VBUS Interrupt Flag (Bit 15)
The VBUS Interrupt Flag bit indicates the status of the OTG
VBUS interrupt (only for Port 1A). When enabled this interrupt
triggers on both the rising and falling edge of VBUS at 4.4V.
This bit is only available for Host 1 and is a reserved bit in
Host 2.
1: Interrupt triggered
0: Interrupt did not trigger
ID Interrupt Flag (Bit 14)
The ID Interrupt Flag bit indicates the status of the OTG ID
interrupt (only for Port 1A). When enabled this interrupt
triggers on both the rising and falling edge of the OTG ID pin.
This bit is only available for Host 1 and is a reserved bit in
Host 2.
1: Interrupt triggered
0: Interrupt did not trigger
SOF/EOP Interrupt Flag (Bit 9)
The SOF/EOP Interrupt Flag bit indicates the status of the
SOF/EOP Timer interrupt. This bit triggers ‘1’ when the
SOF/EOP timer expires.
1: Interrupt triggered
0: Interrupt did not trigger
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• Host 1 Status Register 0xC090
• Host 2 Status Register 0xC0B0
Interrupt Flag
Reserved
VBUS
R/W
15
X
X
7
-
Wake Interrupt
ID Interrupt
Port A
Flag
R/W
Flag
R/W
14
X
X
6
Reserved
Figure 26. Host n Status Register
13
5
X
X
-
-
Port A Connect
Interrupt Flag
Change
R/W
12
X
X
4
-
Port A Wake Interrupt Flag (Bit 6)
The Port A Wake Interrupt Flag bit indicates remote wakeup
on Port A.
1: Interrupt triggered
0: Interrupt did not trigger
Port A Connect Change Interrupt Flag (Bit 4)
The Port A Connect Change Interrupt Flag bit indicates the
status of the Connect Change interrupt on Port A. This bit
triggers ‘1’ on either a rising edge or falling edge of a USB
Reset condition (device inserted or removed). Together with
the Port A SE0 Status bit, it can be determined whether a
device was inserted or removed.
1: Interrupt triggered
0: Interrupt did not trigger
Port A SE0 Status (Bit 2)
The Port A SE0 Status bit indicates if Port A is in an SE0 state
or not. Together with the Port A Connect change Interrupt Flag
bit, it can be determined whether a device was inserted
(non-SE0 condition) or removed (SE0 condition).
1: SE0 condition
0: Non-SE0 condition
Done Interrupt Flag (Bit 0)
The Done Interrupt Flag bit indicates the status of the USB
Transfer Done interrupt. The USB Transfer Done triggers
when either the host responds with an ACK, or a device
responds with any of the following: ACK, NAK, STALL, or
Timeout. This interrupt is used for both Port A and Port B.
1: Interrupt triggered
0: Interrupt did not trigger
Reserved
Reserved
11
X
3
X
-
-
Port A
Status
SE0
R/W
10
X
X
2
-
Interrupt Flag
SOF/EOP
Reserved
R/W
X
X
9
1
-
CY7C67200
Page 26 of 78
Interrupt Flag
Reserved
Done
R/W
X
X
8
0
-
[+] Feedback