TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 102
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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7.6
Exception/Interrupt-Related Registers
31-18
17-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
7.6.2.8
Bit
Note:For descriptions of interrupts and interrupt numbers, see Section "7.5.1.5 List of Interrupt Sources".
−
CLRENA
Bit Symbol
(Interrupt 47)
(Interrupt 39)
CLRENA
CLRENA
Interrupt Clear-Enable Register 2
31
23
15
0
0
0
7
0
-
-
R
R/W
Type
(Interrupt 46)
(Interrupt 38)
CLRENA
CLRENA
30
22
14
0
0
0
6
0
-
-
Read as 0.
Interrupt number [49:32]
[Write]
1: Disabled
[Read]
0: Disabled
1: Enable
Each bit corresponds to the specified number of interrupts. It can be performed to enable interrupts and to check
if interrupts are disabled.
Writing "1" to a bit in this register disables the corresponding interrupt. Writing "0" has no effect.
Reading the bits can see the enable/disable condition of the corresponding interrupts.
(Interrupt 45)
(Interrupt 37)
CLRENA
CLRENA
29
21
13
0
0
0
5
0
-
-
(Interrupt 44)
(Interrupt 36)
Page 82
CLRENA
CLRENA
28
20
12
0
0
0
4
0
-
-
(Interrupt 43)
(Interrupt 35)
CLRENA
CLRENA
27
19
11
Function
0
0
0
3
0
-
-
(Interrupt 42)
(Interrupt 34)
CLRENA
CLRENA
26
18
10
0
0
0
2
0
-
-
TMPM330FDFG/FYFG/FWFG
(Interrupt 49)
(Interrupt 41)
(Interrupt 33)
CLRENA
CLRENA
CLRENA
25
17
0
0
9
0
1
0
-
(Interrupt 48)
(Interrupt 40)
(Interrupt 32)
CLRENA
CLRENA
CLRENA
24
16
0
0
8
0
0
0
-
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