TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 113
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Part Number
Manufacturer
Quantity
Price
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7.6.3
31
30-28
27-26
25
24
23
22-20
19-18
17
16
15
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
7.6.3.1
−
EMCG3[2:0]
EMST3[1:0]
−
INT3EN
−
EMCG2[2:0]
EMST2[1:0]
−
INT2EN
−
Clock generator registers
Bit Symbol
CGIMCGA(CG Interrupt Mode Control Register A)
31
23
15
0
0
0
7
0
-
-
-
-
R
R/W
R
R
R/W
R
R/W
R
R
R/W
R
Type
30
22
14
0
0
0
6
0
Read as 0.
active level setting of INT3 standby clear request. (101~111: setting prohibited)
000: "Low" level
001: "High" level
010: Falling edge
011: Rising edge
100: Both edges
active level of INT3 standby clear request
00: −
01: Rising edge
10: Falling edge
11: Both edges
Reads as undefined.
INT3 clear input
0:Disable
1: Enable
Read as 0.
active level setting of INT2 standby clear request. (101~111: setting prohibited)
000: "Low" level
001: "High" level
010: Falling edge
011: Rising edge
100: Both edges
active level of INT2 standby clear request
00: −
01: Rising edge
10: Falling edge
11: Both edges
Reads as undefined.
INT2 clear input
0:Disable
1: Enable
Read as 0.
EMCG3
EMCG2
EMCG1
EMCG0
29
21
13
1
1
1
5
1
Page 93
28
20
12
0
0
0
4
0
27
19
11
Function
0
0
0
3
0
EMST3
EMST2
EMST1
EMST0
26
18
10
0
0
0
2
0
TMPM330FDFG/FYFG/FWFG
Undefined
Undefined
Undefined
Undefined
25
17
9
1
-
-
-
-
INT3EN
INT2EN
INT1EN
INT0EN
24
16
0
0
8
0
0
0
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