TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 476
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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17.2
Operation Mode
17.2.10.4
See Table 17-9 for the transfer format of this command.
Chip and Protection Bit Erase Command
1. The processing of the 1st and 2nd bytes are the same as for the RAM Transfer command.
2. From the Controller to the TMPM330FDFG/FYFG/FWFG
3. From the TMPM330FDFG/FYFG/FWFG to the Controller
4. From the Controller to the TMPM330FDFG/FYFG/FWFG
5. From the TMPM330FDFG/FYFG/FWFG to the Controller
6. From the TMPM330FDFG/FYFG/FWFG to the Controller
7. The 9th byte is the next command code.
the Show Product Information command is 0x40.
to the 3rd byte.
there was a receive error, the boot program transmits 0xX8 (bit 3) and returns to the command
wait state again. In this case, the upper four bits of the acknowledge response are undefined - they
hold the same values as the upper four bits of the previously issued command.
If the 3rd byte is equal to any of the command codes listed in Table 17-4, the boot program echoes
it back to the controller. When the Show Flash Memory Sum command was received, the boot
program echoes back a value of 0x40. If the 3rd byte is not a valid command, the boot program
sends back 0xX1 (bit 0) to the controller and returns to the state in which it waits for a command
(the third byte) again. In this case, the upper four bits of the acknowledge response are undefined
- they hold the same values as the upper four bits of the previously issued command.
command code (0x54).
to the 5th byte.
Before sending back the acknowledge response, the boot program checks for a receive error. If
there was a receive error, the boot program transmits 0xX8 (bit 3) and returns to the command
wait state again. In this case, the upper four bits of the acknowledge response are undefined - they
hold the same values as the upper four bits of the previously issued command.
If the 5th byte is equal to any of the command codes to enable erasing, the boot program echoes
it back to the controller. When the Chip and Protection Erase command was received, the boot
program echoes back a value of 0x54 and then branches to the Chip Erase routine. If the 5th byte
is not a valid command, the boot program sends back 0xX1 (bit 0) to the controller and returns to
the state in which it waits for a command (the third byte) again. In this case, the upper four bits
of the acknowledge response are undefined - they hold the same values as the upper four bits of
the previously issued command.
At normal completion, completion code (0x4F) is sent.
When an error was detected, error code (0x4C) is sent.
The 3rd byte, which the target board receives from the controller, is a command. The code for
The 4th byte, transmitted from the target board to the controller, is an acknowledge response
Before sending back the acknowledge response, the boot program checks for a receive error. If
The 5th byte, transmitted from the target board to the controller, is the Chip Erase Enable
The 6th byte, transmitted from the target board to the controller, is an acknowledge response
The 7th byte indicates whether the Chip Erase command is normally completed or not.
Page 456
TMPM330FDFG/FYFG/FWFG
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