TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 127
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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8.1.3
8.1.4
Table 8-4 Port conditions in STOP mode
ο :Input or output enabled
× :Input or output disabled
Exclud-
Port
port
ing
<DRVE>=0, both input and output are disabled in STOP mode except for some ports even if PxIE or PxCR are
enabled.
from being fully effective.
Port States in STOP Mode
Precautions for Mode Transition between STOP and SLEEP
Input and output in STOP mode are enabled/disabled by the CGSTBYCR<DRVE> bit.
If PxIE or PxCR is enabled with <DRVE>=1, input or output is enabled respectively in STOP mode.If
Table 8-4 shows the pin conditions in STOP mode.
If PA1 is configured as a debug function pin of TCK/SWCLK, it prevents the low power consumption mode
Configure PA1 to function as a general-purpose port if the debug function is not used.
X1, XT1
X2, XT2
RESET, NMI, MODE
PA0, PB0
[When used for debug (PxFRn<PxmFn>=1)
and output is enabled (PxCR<PxmC>=1)]
(note)
PF7, PG3, PJ0 to PJ3, PJ6, PJ7
[When used for interrupt
(PxFRn<PxmFn>=1) and input is enabled
(PxIE<PxmIE>=1)] (note)
Other ports
Note:"x" indicates a port number, "m" a corresponding bit and "n" a function register number.
Pin Name
Output only
Input only
Input only
Output
Output
Output
Input
Input
Input
I/O
Page 107
"High" Level Output
<DRVE> = 0
×
ο
×
ο
×
×
×
Disabled when data is invalid.
Enabled when data is valid.
TMPM330FDFG/FYFG/FWFG
Depends on PxCR[m].
Depends on PxCR[m].
Depends on PxIE[m].
Depends on PxIE[m]
"High" Level Output
<DRVE> = 1
×
ο
ο
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