TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 212
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Part Number
Manufacturer
Quantity
Price
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9.4
Registers
9.4.5
31-7
6
5
4-3
2
1-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
−
−
TBCP
TBCPM[1:0]
TBCLE
TBCLK[1:0]
TBxMOD(Mode register)
Bit Symbol
31
23
15
0
0
0
7
0
-
-
-
-
R
R/W
W
R/W
R/W
R/W
Type
30
22
14
0
0
0
6
0
-
-
-
-
Read as 0.
Write 0.
Capture control by software
0: Capture by software
1: Don’t care
When "0" is written, the capture register 0 (TBxCP0) takes count value.
Read as 1.
Capture timing
00: Disable Capture timing
01: TBxIN0↑ TBxIN1↑
Takes count values into capture register 0 (TBxCP0) upon rising of TBxIN0 pin input.
Takes count values into capture register 1 (TBxCP1) upon rising of TBxIN1 pin input.
10: TBxIN0↑ TBxIN0↓
Takes count values into capture register 0 (TBxCP0) upon rising of TBxIN0 pin input.
Takes count values into capture register 1 (TBxCP1) upon falling of TBxIN0 pin input.
11: TBxOUT↑ TBxOUT↓
Takes count values into capture register 0 (TBxCP0) upon rising of 16-bit timer match output (TBxOUT)
and into capture register 1 (TBxCP1) upon falling of TBxOUT.
(TMRB0 and TMRB1:TB7OUT, TMRB2 through TMRB4:TB8OUT, TMRB5 and TMRB6:TB9OUT).
Up-counter control
0: Disables clearing of the up-counter.
1: Enables clearing of the up-counter.
Clears and controls the up-counter.
When "0" is written, it disables clearing of the up-counter. When "1" is written, it clears up counter when
there is a match with Timer Regsiter1 (TBxRG1).
Selects the TMRBx source clock.
00: TBxIN0 pin input
01: φT1
10: φT4
11: φT16
TBCP
29
21
13
0
0
0
5
1
-
-
-
Page 192
28
20
12
0
0
0
4
0
-
-
-
TBCPM
27
19
11
Function
0
0
0
3
0
-
-
-
TBCLE
26
18
10
0
0
0
2
0
-
-
-
TMPM330FDFG/FYFG/FWFG
25
17
0
0
9
0
1
0
-
-
-
TBCLK
24
16
0
0
8
0
0
0
-
-
-
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