TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 19

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

17. Flash Memory Operation
18. ROM protection
16.5 Alarm function.....................................................................................................................420
17.1 Flash Memory......................................................................................................................423
17.2 Operation Mode...................................................................................................................426
17.3 On-board Programming of Flash Memory (Rewrite/Erase)................................................464
18.1 Outline.................................................................................................................................479
18.2 Future...................................................................................................................................479
18.3 Register................................................................................................................................480
18.4 Writing and erasing..............................................................................................................483
16.5.1
16.5.2
16.5.3
17.1.1
17.1.2
17.2.1
17.2.2
17.2.3
17.2.4
17.2.5
17.2.6
17.2.7
17.2.8
17.2.9
17.2.10
17.2.11
17.3.1
18.2.1
18.2.2
18.3.1
18.3.2
18.4.1
18.4.2
17.2.2.1
17.2.2.2
17.2.3.1
17.2.9.1
17.2.9.2
17.2.9.3
17.2.9.4
17.2.10.1
17.2.10.2
17.2.10.3
17.2.10.4
17.2.10.5
17.2.10.6
17.2.10.7
17.2.10.8
17.2.10.9
17.3.1.1
17.3.1.2
17.3.1.3
17.3.1.4
17.3.1.5
17.3.1.6
17.3.1.7
17.3.1.8
1Hz cycle "Low" pulse1 Hz...........................................................................................................................................421
16Hz cycle "Low" pulse16 Hz.......................................................................................................................................421
Features..........................................................................................................................................................................423
Block Diagram of the Flash Memory Section...............................................................................................................425
Reset Operation..............................................................................................................................................................427
User Boot Mode (Single chip mode).............................................................................................................................428
Single Boot Mode..........................................................................................................................................................436
Configuration for Single Boot Mode.............................................................................................................................439
Memory Map.................................................................................................................................................................440
Interface specification....................................................................................................................................................441
Data Transfer Format.....................................................................................................................................................442
Restrictions on internal memories.................................................................................................................................442
Transfer Format for Single Boot Mode commands.......................................................................................................442
Flash Memory................................................................................................................................................................464
Write/ erase-protection function....................................................................................................................................479
Security function............................................................................................................................................................479
FCFLCS (Flash control register)...................................................................................................................................481
FCSECBIT(Security bit register)...................................................................................................................................482
Protection bits................................................................................................................................................................483
Security bit.....................................................................................................................................................................483
"Low" pulse (when the alarm register corresponds with the clock).............................................................................420
Operation of Boot Program..........................................................................................................................................449
General Boot Program Flowchart................................................................................................................................463
(1-A) Method 1: Storing a Programming Routine in the Flash Memory
(1-B) Method 2: Transferring a Programming Routine from an External Host
(2-A) Using the Program in the On-Chip Boot ROM
RAM Transfer
Show Flash Memory SUM
Transfer Format for the Show Product Information
Chip Erase and Protect Bit Erase
Block Configuration
Basic operation
Reset(Hardware reset)
Commands
Flash control/ status register
List of Command Sequences
Address bit configuration for bus write cycles
Flowchart
RAM Transfer Command
Show Flash Memory SUM Command
Show Product Information Command
Chip and Protection Bit Erase Command
Acknowledge Responses
Determination of a Serial Operation Mode
Password
Calculation of the Show Flash Memory Sum Command
Checksum Calculation
xi