TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 425
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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15.5
15.5.1
15.5.2
The watchdog timer (WDT) is controlled by two control registers WDMOD and WDCR.
Control register
counter.
This is a register for disabling the watchdog timer function and controlling the clearing function of the binary
Watchdog Timer Mode Register (WDMOD)
Watchdog Timer Control Register(WDCR)
1. Specifying the detection time of the watchdog timer <WDTP[2:0]>.
2. Enabling/disabling the watchdog timer <WDTE>.
3. Watchdog timer out reset connection <RESCR>
WDMOD<WDTP[2:0]> = "000".
bit is set to "0", and then the disable code (0xB1) must be written to WDCR register.
WDMOD<RESCR> is initialized to "1", the internal reset is generated by the overflow of binary coun-
ter.
Set the watchdog timer detecting time to WDMOD<WDTP[2:0]>. After reset, it is initialized to
When resetting, WDMOD <WDTE> is initialized to "1" and the watchdog timer is enabled.
To disable the watchdog timer to protect from the error writing by the malfunction, first <WDTE>
To change the status of the watchdog timer from "disable" to "enable," set the <WDTE> bit to "1".
This register specifies whether WDTOUT is used for internal reset or interrupt. After reset,
Page 405
TMPM330FDFG/FYFG/FWFG
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