TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 363
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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12.4.3.3
12.4.3.4
<CECTEN> bit.
identify the interrupt factor by checking these bits.
(1)
Error detection during transmission generates an interrupt and stops transmission. It clears the CECTEN
To identify an error factor, the CECTSTAT register has bits that correspond with each interrupt. You can
Note:An attempt to stop transmission by an error may cause an improper waveform output to CEC. This is
Detecting Transmission Error
Details of Transmission Error
Start bit
Data bit
EOMbit
ACK bit
because output is stopped immediately after the error occurs.
An arbitration lost error occurs when CEC detects "Low" on completion of appropriate low duration.
Detecting an arbitration lost error sets the CECTSTAT <CECTIAL> bit.
Two types of the arbitration lost detection periods are shown below.
Arbitration Lost
Maximum “0”
output time
1.7 ms
Page 343
“0” output time
0.3 ms
2.0 ms
Detection
0.3 ms
period
Detection
period
Cycle setting :
CECTCR<CECDPRD>
Beginning of
next bit
TMPM330FDFG/FYFG/FWFG
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