TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 91
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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number of bits actually used varies with each product.Priority level 0 is the highest priority level.If
multiple sources have the same priority, the smallest-numbered interrupt source has the highest priority.
Control Register.
used as the function pin. Setting PxIE[m] allows the pin to be used as the input port.
function for details.
of this register.
enable interrupts in the CGIMCG register of the clock generator. The CGIMCG register is capable of
configuring each source.
NVIC register
<PRI_n>
<PRIGROUP>
Port register
PxFRn<PxmFn>
PxIE<PxmIE>
NVIC register
Interrupt Set-Pending [m]
Each interrupt source is provided with eight bits for assigning a priority level from 0 to 255, but the
You can assign grouping priority by using the PRIGROUP field in the Application Interrupt and Reset
Set "1" to the port function register of the corresponding pin. Setting PxFRn[m] allows the pin to be
The setting varies depending on the peripheral function to be used. See the chapter of each peripheral
To generate an interrupt by using the Interrupt Set-Pending Register, set "1" to the corresponding bit
For an interrupt source to be used for exiting a standby mode, you need to set the active level and
Note:"n" indicates the corresponding exceptions/interrupts.
Note:x: port number / m: corresponding bit / n: function register number
Note:m: corresponding bit
Preconfiguration (1) (Interrupt from external pin)
Preconfiguration (2) (Interrupt from peripheral function)
Preconfiguration (3) (Interrupt Set-Pending Register)
Configuring the clock generator
This product uses three bits for assigning a priority level.
In modes other than STOP mode, setting PxIE to enable input enables the corresponding
interrupt input regardless of the PxFR setting. Be careful not to enable interrupts that are
not used. Also, be aware of the description of "7.5.1.4 Precautions when using external
interrupt pins".
←
←
←
←
←
"priority"
"group priority"(This is configurable if required.)
"1"
"1"
"1"
Page 71
TMPM330FDFG/FYFG/FWFG
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