TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 345

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TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
12.3.10
31-2
1
0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
CECTRANS
CECTEN
Note 1: Set <CECTEN> after setting the CECTBUF and CECTCR register.
Note 2: Stop transmission and reception before changing the settings or enabling the transmission and reception.
Bit Symbol
CECTEN (Transmit Enable Register)
31
23
15
0
0
0
7
0
-
-
-
-
R
R
W
Type
30
22
14
0
0
0
6
0
Read as 0.
Transmission state
0: not in progress
1:in progress
Indicates whether the transmission is in progress or not.
It indicates "1" upon starting the transmission of the start bit. It indicates "0" if transmission is completed or
an interrupt is generated.
Writing to this bit is ignored.
Transmission control
0: Disable
1: Enable
Controls the CEC transmission.
Writing this bit enables or disables the transmission. Writing "1" to this bit initiates the transmission.
This bit is automatically cleared by a transmit completion interrupt or an error interrupt.
-
-
-
-
29
21
13
0
0
0
5
0
-
-
-
-
Page 325
28
20
12
0
0
0
4
0
-
-
-
-
27
19
11
Function
0
0
0
3
0
-
-
-
-
26
18
10
0
0
0
2
0
-
-
-
-
TMPM330FDFG/FYFG/FWFG
CECTRANS
25
17
0
0
9
0
1
0
-
-
-
Undefined
CECTEN
24
16
0
0
8
0
0
-
-
-

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