ADUC7122 Analog Devices, ADUC7122 Datasheet - Page 36

• Manufacturer Part Number: ADUC7122
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI® MCU
• Manufacturer: Analog Devices

Specifications of ADUC7122

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 32
• Adc # Channels: 13

ADuC7122
NONVOLATILE FLASH/EE MEMORY
FLASH/EE MEMORY OVERVIEW
The ADuC7122 incorporates Flash/EE memory technology
on-chip to provide the user with nonvolatile, in-circuit
reprogrammable memory space.
Like EEPROM, Flash memory can be programmed in-system
at a byte level, although it must first be erased. The erase is
performed in page blocks. As a result, Flash memory is often
and more correctly referred to as Flash/EE memory.
Overall, Flash/EE memory represents a step closer to the ideal
memory device that includes no volatility, in-circuit program-
mability, high density, and low cost. Incorporated in the
ADuC7122, Flash/EE memory technology allows the user to
update program code space in-circuit, without the need to
replace one-time programmable (OTP) devices at remote
operating nodes.
FLASH/EE MEMORY
The ADuC7122 contains two 64 kB arrays of Flash/EE memory.
In the upper block of Flash/EE memory, the bottom 62 kB are
available to the user and the top 2 kB of this Flash/EE program
memory array contain permanently embedded firmware, allow-
ing in-circuit serial download. The 2 kB of embedded firmware
also contain a power-on configuration routine that downloads
factory-calibrated coefficients to the various calibrated peripherals
(band gap references and so on). This 2 kB embedded firmware is
hidden from user code. It is not possible for the user to read, write,
or erase this page. In the second block, all 64 kB of Flash/EE
memory are available to the user.
The 126 kB of Flash/EE memory can be programmed in-circuit,
using the serial download mode or the JTAG mode provided.
Flash/EE Memory Reliability
The Flash/EE memory arrays on the ADuC7122 is fully
qualified for two key Flash/EE memory characteristics:
Flash/EE memory cycling endurance and Flash/EE memory
data retention.
Endurance quantifies the ability of the Flash/EE memory
to be cycled through many program, read, and erase cycles.
A single endurance cycle is composed of four independent,
sequential events:
In reliability qualification, three separate page blocks from each
Flash/EE memory block is tested. An entire Flash/EE page at
the top, middle, and bottom of each Flash/EE memory block is
cycled 10,000 times from 0x0000 to 0xFFFF.
1.
2.
3.
4.
Read/verify a single Flash/EE sequence
Byte program memory sequence
Second read/verify endurance cycle sequence
Initial page erase sequence
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As indicated in the General Description section, the Flash/EE
memory endurance qualification is carried out in accordance with
JEDEC Retention Lifetime Specification A117 over the industrial
temperature range of –10° to +95°C. The results allow the
specification of a minimum endurance figure over a varying
supply across the industrial temperature range for 10,000 cycles.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. The parts are qualified
in accordance with the formal JEDEC Retention Lifetime
Specification (A117) at a specific junction temperature (T
85°C). As part of this qualification procedure, the Flash/EE
memory is cycled to its specified endurance limit, described
previously, before data retention is characterized. This means
that the Flash/EE memory is guaranteed to retain its data for
its fully specified retention lifetime every time the Flash/EE
memory is reprogrammed. Note, too, that retention lifetime,
based on activation energy of 0.6 eV, derates with T
in Figure 25.
Serial Downloading (In-Circuit Programming)
The ADuC7122 facilitates code download via the I
port. The ADuC7122 enters serial download mode after a reset
or power cycle if the BM pin is pulled low through an external
1 kΩ resistor. This is combined with the state of Address
0x00014 in Flash. If this address is 0xFFFFFFFF and the BM pin
is pulled low, the part enters download mode; if this address
contains any other value, user code is executed. When in serial
download mode, the user can download code to the full 126 kB
of Flash/EE memory while the device is in-circuit in its target appli-
cation hardware. A PC executable serial download and hardware
dongle are provided as part of the development system for serial
downloads via the I
JTAG Access
The JTAG protocol uses the on-chip JTAG interface to facilitate
code download and debug.
600
450
300
150
0
30
Figure 25. Flash/EE Memory Data Retention
40
2
C port.
JUNCTION TEMPERATURE (°C)
55
70
85
100
125
135
2
C serial
J
, as shown
150
J
=