ADUC7122 Analog Devices, ADUC7122 Datasheet - Page 84

• Manufacturer Part Number: ADUC7122
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI® MCU
• Manufacturer: Analog Devices

Specifications of ADUC7122

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 32
• Adc # Channels: 13

ADuC7122
The Timer0 interface consists of six MMRs, shown in Table 143.
Table 143. Timer0 Interface MMRs
Name
T0LD
T0CAP
T0VAL0/T0VAL1
T0CLRI
T0CON
Table 144. Timer0 Value Register
Name
T0VAL0
T0VAL1
T0VAL0 and T0VAL1 are 16-bit and 32-bit registers that hold
the 16 least significant bits and 32 most significant bits,
respectively. T0VAL0 and T0VAL1 are read-only. In 16-bit
mode, 16-bit T0VAL0 is used. In 48-bit mode, both 16-bit
T0VAL0 and 32-bit T0VAL1 are used.
Table 145. Timer0 Capture Register
Name
T0CAP
This is a 16-bit register that holds the 16-bit value captured by
an enabled IRQ event; it is only available in 16-bit mode.
Table 146. Timer0 Control Register
Name
T0CON
The 17-bit MMR configures the mode of operation of Timer0.
Description
16-bit register that holds the 16-bit value
loaded into the counter. Available only in
16-bit mode.
16-bit register that holds the 16-bit value
captured by an enabled IRQ event. Available
only in 16-bit mode.
TOVAL0 is a 16-bit register that holds the 16
least significant bits (LSBs).
T0VAL1 is a 32-bit register that holds the 32
most significant bits (MSBs).
8-bit register. Writing any value to this register
clears the interrupt. Available only in 16-bit
mode.
Configuration MMR.
Address
0xFFFF0304
0xFFFF0308
Address
0xFFFF0314
Address
0xFFFF030C
Default Value
0x00,
0x00
Default Value
0x00
Default Value
0x00
Access
R
R
Access
R
Access
R/W
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Table 147. T0CON MMR Bit Designations
Bit
31:18
17
16:12
11
10:9
8
7
6
5
4
3:0
Table 148. Timer0 Load Registers
Name
T0LD
T0LD is a 16-bit register that holds the 16-bit value that is
loaded into the counter; it is available only in 16-bit mode.
Table 149. Timer0 Clear Register
Name
T0CLRI
This 8-bit, write-only MMR is written (with any value) by user
code to refresh (reload) Timer0.
Value
00
01
10
11
0
1
0000
0100
1000
1111
Address
0xFFFF0300
Address
0xFFFF0310
Description
Reserved.
Event select bit.
Set by the user to enable time capture of an
event.
Cleared by the user to disable time capture of
an event.
Event select (ES) range, 0 to 17. The events are
as described in the Timers section.
Reserved.
Clock select.
Internal 32 kHz oscillator.
UCLK.
External 32 kHz crystal.
HCLK.
Count up. Available only in 16-bit mode.
Set by the user for Timer0 to count up.
Cleared by the user for Timer0 to count down
(default).
Timer0 enable bit.
Set by the user to enable Timer0.
Cleared by the user to disable Timer0
(default).
Timer0 mode.
Set by the user to operate in periodic mode.
Cleared by the user to operate in free-running
mode (default).
Reserved.
Timer0 mode of operation.
16-bit operation (default).
48-bit operation.
Prescaler.
Source clock/1 (default).
Source clock/16.
Source clock/256.
Source clock/32,768.
Default Value
0x00
Default Value
0x00
Access
R/W
Access
W