LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 109

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LM3S102

Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 6, 2006
Reset
Reset
Type
Type
GPIO Direction (GPIODIR)
Offset 0x400
RO
RO
31
15
0
0
31:8
7:0
Bit
Register 2: GPIO Direction (GPIODIR), offset 0x400
The GPIODIR register is the data direction register. Bits set to 1 in the GPIODIR register configure
the corresponding pin to be an output, while bits set to 0 configure the pins to be inputs. All bits are
cleared by a reset, meaning all GPIO pins are inputs by default.
RO
RO
30
14
0
0
reserved
Name
DIR
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPIO Data Direction
0: Pins are inputs.
1: Pins are outputs.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
DIR
R/W
RO
19
0
3
0
LM3S102 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
109

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