LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 279

• Manufacturer Part Number: LM3S102
• Description: Lm3s102 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table 13-3. Write Field Decoding for I2CMCS[3:0] Field (Sheet 3 of 3)
a. An X in a table cell indicates that applies to a bit set to 0 or 1.
b. In Master Receive mode, a STOP condition should be generated only after a Data Negative Acknowledge executed by the
July 6, 2006
Master
Receive
master or an Address Negative Acknowledge executed by the slave.
Current
State
All other combinations not listed are non-operations.
I2CMSA[0]
R/S
X
X
X
X
X
1
1
1
0
0
ACK
X
X
X
0
0
1
1
0
0
1
STOP
I2CMCS[3:0]
0
1
1
0
1
0
1
0
0
1
Preliminary
START
0
0
0
0
0
1
1
1
1
1
RUN
1
0
1
1
1
1
1
1
1
1
RECEIVE operation with negative ACK
(master remains in Master Receive
state).
STOP condition (master goes to Idle
state).
RECEIVE followed by STOP condition
(master goes to Idle state).
RECEIVE operation (master remains in
Master Receive state).
Illegal.
Repeated START condition followed by
RECEIVE operation with a negative ACK
(master remains in Master Receive
state).
Repeated START condition followed by
RECEIVE and STOP condition (master
goes to Idle state).
Repeated START condition followed by
RECEIVE (master remains in Master
Receive state).
Repeated START condition followed by
SEND (master goes to Master Transmit
state).
Repeated START condition followed by
SEND and STOP condition (master goes
to Idle state).
NOP.
b
Description
LM3S102 Data Sheet
279