LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 21

• Manufacturer Part Number: LM3S102
• Description: Lm3s102 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 6, 2006
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GPIOs
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Power
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Flexible Reset Sources
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Additional Features
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Compare external pin input to external pin input or to internal programmable voltage
reference
Master and slave receive and transmit operation with transmission speed up to 100 Kbps in
Standard mode and 400 Kbps in Fast mode
Interrupt generation
Master with arbitration and clock synchronization, multimaster support, and 7-bit
addressing mode
Up to 18 GPIOs, depending on configuration
Programmable interrupt generation as either edge-triggered or level-sensitive
Bit masking in both read and write operations through address lines
Programmable control for GPIO pad configuration:
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On-chip Linear Drop-Out (LDO) voltage regulator, with programmable output
user-adjustable from 2.25 V to 2.75 V
Low-power options on controller: Sleep and Deep-sleep modes
Low-power options for peripherals: software controls shutdown of individual peripherals
User-enabled LDO unregulated voltage detection and automatic reset
3.3-V supply brownout detection and reporting via interrupt or reset
Power-on reset (POR)
Reset pin assertion
Brown-out (BOR) detector alerts to system power drops
Software reset
Watchdog timer reset
Internal linear drop-out (LDO) regulator output goes unregulated
Six reset sources
Programmable clock source control
Clock gating to individual peripherals for power savings
IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
Debug access via JTAG and Serial Wire interfaces
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
Preliminary
LM3S102 Data Sheet
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