LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 124

• Manufacturer Part Number: LM3S102
• Description: Lm3s102 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

General-Purpose Input/Outputs (GPIOs)
124
Reset
Type
Reset
Type
GPIO Slew Rate Control Select (GPIOSLR)
Offset 0x518
RO
RO
31
15
0
0
31:8
7:0
Bit
Register 17: GPIO Slew Rate Control Select (GPIOSLR), offset 0x518
The GPIOSLR register is the slew rate control register. Slew rate control is only available when
using the 8-mA drive strength option via the GPIO 8-mA Drive Select (GPIODR8R) register (see
page 120).
RO
RO
30
14
0
0
reserved
Name
SRL
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
Slew Rate Limit Enable (8-mA drive only)
0: Slew rate control disabled.
1: Slew rate control enabled.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
SRL
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
July 6, 2006
0
1
0
R/W
RO
16
0
0
0