LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 271

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LM3S102

Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Figure 13-13. Slave Command Sequence
13.2.2
July 6, 2006
Available Speed Modes
The SCL clock rate is determined by the parameters: CLK_PRD, TIMER_PRD, SCL_LP and
SCL_HP.
where:
CLK_PRD
SCL_HP
SCL_HP
TIMER_PRD
page 281).
The SCL clock period is calculated as follows:
SCL_PERIOD = 2*(1 + TIMER_PRD)*(SCL_LP + SCL_HP)*CLK_PRD
For example:
CLK_PRD = 33.33 ns
TIMER_PRD=3
SCL_LP=6
SCL_HP=4
yields a SCL frequency of:
1/T = 375 Khz
is the Low phase of the SCL clock (fixed at 6)
is the High phase of the SCL clock (fixed at 4)
is the system clock period
is the programmed value in the I2C Master Timer Period (I2CMTPR) register (see
address to I2CSOAR
write OWN Slave
write “-------1”
to I2CSCSR
N
N
read I2CSCSR
Idle
write Data to
RREQ=”1”
TREQ=”1”
I2CSDR
Preliminary
Y
Y
read Data from
I2CSDR
LM3S102 Data Sheet
271

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