LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 287

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LM3S102

Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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13.6
July 6, 2006
Reset
Reset
Type
Type
I2C Slave Own Address Register (I2CSOAR)
Offset 0x000
Bit Field
RO
RO
31
15
0
0
31:7
6:0
Register Descriptions (I
The remainder of this section lists and describes the I
address offset. See also “Register Descriptions (I2C Master)” on page 273.
Register 10: I
This register consists of seven address bits that identify the Stellaris I
RO
RO
30
14
0
0
reserved
RO
RO
Name
29
13
0
0
OAR
RO
RO
28
12
2
0
0
C Slave Own Address (I2CSOAR), offset 0x000
reserved
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
RO
RO
25
0
9
0
Reset
Preliminary
2
0
0
C Slave)
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
I
This field specifies bits A6 through A0 of the slave
address.
2
C Slave Own Address
RO
RO
23
0
7
0
R/W
2
RO
22
0
6
0
C slave registers, in numerical order by
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
2
C device on the I
OAR
R/W
RO
19
0
3
0
LM3S102 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
2
C bus.
R/W
RO
16
0
0
0
287

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