MD2433-D8G-V3Q18-X-P SanDisk, MD2433-D8G-V3Q18-X-P Datasheet - Page 46

• Manufacturer Part Number: MD2433-D8G-V3Q18-X-P
• Description: IC MDOC H1 8GB 115-FBGA
• Manufacturer: SanDisk

Specifications of MD2433-D8G-V3Q18-X-P

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 8G (1G x 8)
• Speed: 64ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 115-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.8
This section discusses hardware design issues for major embedded RISC processor families.
7.8.1
Wait states can be implemented only when mDOC H1 is designed in a bus that supports a Wait
state insertion, and supplies a WAIT signal.
7.8.2
mDOC H1 is a Little Endian device. Therefore, byte lane 0 (D[7:0]) is its Least Significant Byte
(LSB) and byte lane 1 (D[15:8]) is its Most Significant Byte (MSB). Within the byte lanes, bit D0
and bit D8 are the least significant bits of their respective byte lanes. mDOC H1 can be connected to
a Big Endian device in one of two ways:
1. Make sure to identify byte lane 0 and byte lane 1 of your processor. Then, connect the data bus
2. Set the bits SWAPH and SWAPL in the Endian Control register. This enables byte swapping
7.8.3
The Busy signal (BUSY#) indicates that mDOC H1 has not yet completed internal initialization.
After reset, BUSY# is asserted while the IPL is downloaded into the internal boot block and the
Data Protection Structures (DPS) are downloaded to the Protection State Machines. Once the
download process is completed, BUSY# is negated. It can be used to delay the first access to
mDOC H1 until it is ready to accept valid cycles.
Note: mDOC H1 does NOT use this signal to indicate that the flash is in busy state (e.g. program,
7.8.4
mDOC H1 uses a 16-bit data bus and supports 16-bit data access by default. However, it can be
configured to support 8 or 32-bit data access mode. This section describes the connections required
for each mode.
The default of the TrueFFS driver for mDOC H1 is set to work in 16-bit mode. It must be specially
configured to support 8 and 32-bit mode. Please see TrueFFS documentation for further details.
Note: The mDOC H1 data bus must be connected to the Least Significant Bits (LSB) of the system.
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so that the byte lanes of the CPU match the byte lanes of mDOC H1. Pay special attention to
processors that also change the bit ordering within the bytes (for example, PowerPC). Failing to
follow these rules results in improper connection of mDOC H1, and prevents the TrueFFS
driver from identifying it.
when used with 16-bit hosts.
read, or erase).
The system engineer must verify whether the matching host signals are SD[7:0], SD[15:8] or
D[31:24].
Platform-Specific Issues
Wait State
Big and Little Endian Systems
Busy Signal
Working with 8/16/32-Bit Systems
Data Sheet, Rev. 1.1
mDOC H1 4Gb (512MByte) and 8Gb (1GByte)
95-DT-1104-01