MD2433-D8G-V3Q18-X-P SanDisk, MD2433-D8G-V3Q18-X-P Datasheet - Page 5

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MD2433-D8G-V3Q18-X-P

Manufacturer Part Number
MD2433-D8G-V3Q18-X-P
Description
IC MDOC H1 8GB 115-FBGA
Manufacturer
SanDisk
Datasheet

Specifications of MD2433-D8G-V3Q18-X-P

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
8G (1G x 8)
Speed
64ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-30°C ~ 85°C
Package / Case
115-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
MD2433-D8G-V3Q18-X-P
Manufacturer:
SANDISK
Quantity:
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Part Number:
MD2433-D8G-V3Q18-X-P
Manufacturer:
M-SYSTEM
Quantity:
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Part Number:
MD2433-D8G-V3Q18-X-P
Manufacturer:
SanDisk
Quantity:
10 000
5. Register Descriptions ............................................................................................................. 30
6. Booting from mDOC H1 .......................................................................................................... 38
7. Design Considerations ........................................................................................................... 39
5
4.6
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10 Output Control Register.................................................................................................... 37
6.1
6.2
7.1
7.2
7.3
7.4
7.5
7.6
7.7
4.5.3
4.5.4
4.5.5
4.5.6
4.5.7
4.5.8
4.5.9
4.5.10 Compatibility ....................................................................................................................... 29
8KB Memory Window ....................................................................................................... 29
Definition of Terms ........................................................................................................... 30
Reset Values .................................................................................................................... 30
No Operation (NOP) Register........................................................................................... 31
Chip Identification (ID) Register and Chip Identification Confirmation Register [0:1] ....... 31
Endian Control Register ................................................................................................... 32
mDOC Control Register/Control Confirmation Register ................................................... 33
Device ID Select Register................................................................................................. 34
Configuration Register...................................................................................................... 35
Interrupt Control Register ................................................................................................. 36
Introduction....................................................................................................................... 38
Boot Replacement ............................................................................................................ 38
6.2.1
General Guidelines........................................................................................................... 39
Standard NOR-Like Interface ........................................................................................... 40
Multiplexed Interface ........................................................................................................ 41
Connecting Control Signals .............................................................................................. 42
7.4.1
7.4.2
Implementing the Interrupt Mechanism ............................................................................ 43
7.5.1
7.5.2
Device Cascading............................................................................................................. 44
Boot Replacement ............................................................................................................ 45
TrueFFS Software Development Kit (SDK)........................................................................ 27
File Management................................................................................................................ 27
Bad-Block Management ..................................................................................................... 27
Wear-Leveling .................................................................................................................... 27
Power Failure Management ............................................................................................... 28
Error Detection/Correction.................................................................................................. 28
Special Features Through I/O Control (IOCTL) Mechanism.............................................. 28
Asynchronous Boot Mode .................................................................................................. 38
Standard Interface.............................................................................................................. 42
Multiplexed Interface .......................................................................................................... 42
Hardware Configuration ..................................................................................................... 43
Software Configuration....................................................................................................... 43
Data Sheet, Rev. 1.1
mDOC H1 4Gb (512MByte) and 8Gb (1GByte)
95-DT-1104-01

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