DSP56309EVM Freescale Semiconductor, DSP56309EVM Datasheet - Page 109

KIT EVALUATION FOR XC56309

DSP56309EVM

Manufacturer Part Number
DSP56309EVM
Description
KIT EVALUATION FOR XC56309
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of DSP56309EVM

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Description/function
Audio DSPs
Product
Audio Modules
For Use With/related Products
DSP56309
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
respectively. When host requests are enabled, the host request pins operate as shown in Figure
6-3.
Table 6-5 shows the operation of the
test these ICR bits to determine the interrupt source.
Table 6-6 shows the operation of the transmit request (
with dual host requests enabled.
Table 6-6. HTRQ and HRRQ Pin Operation In Double Request Mode (ICR[2] = HDRQ = 1)
6.4.5 Endian Modes
The Host Little Endian bit in the host-side Interface Control Register (ICR[5] = HLEND) allows
the host to access the HI08 data registers in Big Endian or Little Endian mode. In Little Endian
mode (HLEND = 1), a host transfer occurs as shown in Figure 6-4.
Freescale Semiconductor
ICR[1] = TREQ
Host Request
$2
$0
ICR[1] = TREQ
Table 6-5. HREQ Pin Operation In Single Request Mode (ICR[2] = HDRQ = 0)
Asserted
0
0
1
1
HREQ
7
7
INIT
0
0
1
1
0
0
ICR[0] = RREQ
0
0
0
1
0
1
Figure 6-3. HI08 Host Request Structure
HF3
HF1
ICR[0] = RREQ
HF2 TRDY
HF0 HLEND TREQ RREQ ICR
0
1
0
1
DSP56309 User’s Manual, Rev. 1
No interrupts
No interrupts
TXDE Request enabled
TXDE Request enabled
HREQ
pin when a single request line is used. The host can
TXDE RXDF ISR
HTRQ Pin
No interrupts
RXDF request enabled
TXDE request enabled
RXDF and TXDE request enabled
Enable
Status
HTRQ
0
0
) and receive request (
No interrupts
RXDF request enabled
No interrupts
RXDF request enabled
HREQ Pin
HRRQ Pin
Host Request
Signals
HRRQ
HRRQ
HREQ
HTRQ
) lines
Operation
6-9

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