S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 59

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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2.3
This section provides a detailed description of all Port Integration Module registers.
Freescale Semiconductor
Port
V
Signals in brackets denote alternative module routing pins.
Function active when RESET asserted.
Pin Name
PV[7]
PV[6]
PV[5]
PV[4]
PV3
PV2
PV1
PV0
Memory Map and Register Definition
Pin Function
& Priority
M3C1M
IOC1_3
M3C0M
IOC1_2
M2C1M
IOC1_1
M2C0M
IOC1_0
M3C1P
M3C0P
M2C1P
M2C0P
PWM7
PWM6
PWM5
PWM4
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
MOSI
GPIO
MISO
GPIO
SCK
SDA
SCL
SS
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MC9S12HY/HA-Family Reference Manual, Rev. 1.04
I/O
I/O General purpose
I/O TIM1 channel 3
I/O General purpose
I/O General purpose
I/O TIM1 channel 2
I/O General purpose
I/O SDA of IIC, mappable through software
I/O PWM channel 7, mappable through software
I/O SS of SPI, mappable through software
I/O General purpose
I/O TIM1 channel 1
I/O SCK of SPI, mappable through software
I/O PWM channel 6, mappable through software
I/O General purpose
I/O MOSI of SPI, mappable through software
I/O General purpose
I/O TIM1 channel 0
I/O SCL of IIC, mappable through software
I/O MISO of SPI, mappable through software
I/O General purpose
O
O
O
O
O
O
O
O
O
O
Motor control output for motor 3
Motor control output for motor 3
Motor control output for motor 3
Motor control output for motor 3
Motor control output for Motor 2
Motor control output for Motor 2
Motor control output for Motor 2
PWM channel 5, mappable through software
Motor control output for Motor 2
PWM channel 4, mappable through software
Description
Port Integration Module (S12HYPIMV1)
Pin Function
after Reset
GPIO
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