S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 698

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Motor Controller (MC10B8CV1)
19.4.1.1.1
PWM channel pairs x and x + 1 operate in dual full H-bridge mode if both channels have been enabled
(MCAM[1:0]=01, 10, or 11) and both of the corresponding output mode bits MCOM[1:0] in both PWM
channel control registers are set.
A typical configuration in dual full H-bridge mode is shown in
PWM output signal on either MnC0P or MnC0M. If MnC0P drives the PWM signal, MnC0M will be
output either high or low depending on the RECIRC bit. If MnC0M drives the PWM signal, MnC0P will
be an output high or low. PWM channel x + 1 drives the PWM output signal on either MnC1P or MnC1M.
If MnC1P drives the PWM signal, MnC1M will be an output high or low. If MnC1M drives the PWM
signal, MnC1P will be an output high or low. This results in motor recirculation currents on the high side
drivers (RECIRC = 0) while the PWM signal is at a logic high level, or motor recirculation currents on the
low side drivers (RECIRC = 1) while the PWM signal is at a logic low level. The pin driving the PWM
signal is determined by the S (sign) bit in the corresponding duty cycle register and the state of the
RECIRC bit. The value of the PWM duty cycle is determined by the value of the D[10:0] or D[8:2] bits
respectively in the duty cycle register depending on the state of the FAST bit.
698
Pair Number
Table 19-11. Corresponding Registers and Pin Names for Each PWM Channel Pair (continued)
Channel
PWM
1
2
3
Dual Full H-Bridge Mode (MCOM = 11)
Channel Control
Register
MCMC2
MCMC3
MCMC4
MCMC5
MCMC6
MCMC7
PWM
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Duty Cycle
Register
MCDC2
MCDC3
MCDC4
MCDC5
MCDC6
MCDC7
Figure
PWM Channel 2
PWM Channel 3
PWM Channel 4
PWM Channel 5
PWM Channel 6
PWM Channel 7
Channel
Number
19-10. PWM channel x drives the
Freescale Semiconductor
M1C0M
M1C1M
M2C0M
M2C1M
M3C0M
M3C1M
Names
M1C0P
M1C1P
M2C0P
M2C1P
M3C0P
M3C1P
Pin