S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 62

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Port Integration Module (S12HYPIMV1)
62
Port
Wak
Key
eup
AD
R
Offset or
Address
0x028C
0x028D
0x027F
0x028A
0x028B
0x028E
0x028F
0x0270
0x0271
0x0272
0x0273
0x0274
0x0275
0x0276
0x0277
0x0278
0x0280
0x0281
0x0282
0x0283
0x0284
0x0285
0x0286
0x0287
0x0288
0x0289
:
PIM Reserved
PT1AD—Port AD Data Register
PIM Reserved
DDR1AD - Port AD Data Direction Register
PIM Reserved
RDR1AD—Port AD Reduced Drive Register
PIM Reserved
PER1AD—Port AD Pull Up Enable Register
PIM Reserved
PTR—Port R Data Register
PTIR—Port R Input Register
DDRR—Port R Data Direction Register
RDRR—Port R Reduced Drive Register
PERR—Port R Pull Device Enable Register
PPSR—Port R Polarity Select Register
WOMR—Port R Wired-Or Mode Register
PIM Reserved
PIET—Port T Interrupt Enable Register
PIFT—Port T Interrupt Flag Register
PIES—Port S Interrupt Enable Register
PIFS—Port S Interrupt Flag Register
PIE1AD—Port AD Interrupt Enable Register
PIF1AD—Port AD Interrupt Flag Register
PIER—Port R Interrupt Enable Register
PIFR—Port R Interrupt Flag Register
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-2. Block Memory Map (continued)
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Freescale Semiconductor
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