HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 385

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Operation when Error Occurs during Normal Mode Operation, and Operation is Restarted
in Normal Mode: Figure 11.85 shows an explanatory diagram of the case where an error occurs
in normal mode and operation is restarted in normal mode after re-setting.
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. After a reset, the TMDR setting is for normal mode.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4. Initialize the pins with TIOR. (The example shows initial high output, with low output on
5. Set MTU output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. Not necessary when restarting in normal mode.
11. The count operation is stopped by TSTR.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
MTU module output
compare-match occurrence.)
Port output
Figure 11.85
n=0 to 15
TIOC*A
TIOC*B
PEn
PEn
RESET
1
(normal)
TMDR
Error Occurrence in Normal Mode, Recovery in Normal Mode
2
TOER
Hi-Z
Hi-Z
(1)
3
0 out)
TIOR
(1 init
4
(MTU)
PFC
5
TSTR
(1)
6
Match
7
11.
Rev.4.00 Mar. 27, 2008 Page 339 of 882
occurs
Error
8
Multi-Function Timer Pulse Unit (MTU)
(PORT)
PFC
9
TSTR
(0)
10
(normal)
TMDR
11
0 out)
(1 init
TIOR
REJ09B0108-0400
12
(MTU)
PFC
13
TSTR
(1)
14

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